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MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy Version!
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This Repo contains hardware, Verilog source and USB3.0 USB video device class (UVC) Controller C source for generic FPGA CSI receiver. No FPGA hardware specific components has been used so can be easily ported to any low cost FPGA.
Supports Frame Rate from 15 to 1000 FPS , Resolution From 640x80 to Full 8M 3280x2464. Max data rate ~2Gbps at 1080p 60FPS. Full control of Frame rate and Resolution over UVC control. Manual Exposure and manual Brightness control for now. Manual exposure is mapped to UVC saturation Control. Test Pattern can also be enabled with mapped gamma control.
Test Has been done at 3280x2464 15FPS 1920x1080 60FPS 1920x1080 30FPS 1280x720 120FPS 1280x720 60FPS 1280x720 30FPS 640x480 200FPS 640x480 30FPS 640x128 682FPS 640x80 1000FPS
I have published an improved version of FPGA ISP implimention, New version support versious Image format with variable Pipleline width and Higher speed also decoulped Output clock to achive higer throughput , here you can find source of new version here. https://github.com/circuitvalley/USB_C_Industrial_Camera_FPGA_USB3
MIPI CSI-2 Receiver on Lattice FPGA (c) by Gaurav Singh www.CircuitValley.com MIPI CSI-2 Receiver on Lattice FPGA is licensed under a Creative Commons Attribution 3.0 Unported License. You should have received a copy of the license along with this work. If not, see http://creativecommons.org/licenses/by/3.0/.
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This work is licensed under a Creative Commons Attribution 4.0 International License.
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