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PCC-CS492-CA
This repository contains the source codes for design of circuits written in VHDL using Xilinx (14.7), which were practiced as a part of my CA lab during my BTech 4th semester.
#circuit-design#college-assignment#fgpa#ise#spartan3-fpga#vhdl
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Computer Architecture Lab (PCC-CS492)
This repository contains the source codes for design of various combinational and sequential circuits using logic gates and componenets written in VHDL using Xilinx (14.7), which were practiced as a part of my Computer Architecture Lab during my 4th semester.
Programs List
| Group | Files | Link |
|---|---|---|
| Basic Gates | AND, OR, NAND | |
| Adders | Half Adder, Full Adder, Full using Half Adder, 4 bit Adder, 8 bit Adder | |
| Subtractors | Half Subtractor, Full Subtractor, Full using Half Subtractor, 4 bit Subtractor, 8 bit Subtractor | |
Run Locally
Clone the project
git clone https://github.com/uiuxarghya/PCC-CS492
Go to the project directory
cd PCC-CS492
Feedback
Any suggestions and/or improvements are welcome. Please create a pull request or open an issue to submit your feedback.