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ahegazy / repository
This repository contains scripts that I create through my digital design course in Verilog, VHDL, SystemVerilog etc..
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This repository contains scripts that I create through my digital design course.
ALU Arithmetic and logic unit that can perform addition, substation, bitwise operations like AND ,OR ,Shift Left, Shift Right, Rotate Left and Rotate Right.
SequenceDetector Detects a sequence of “110100” without any overlapping using FSM algorithm.
Queue Manager Monitors the client queue in front of the tellers.
UART Universal asynchronous receiver-transmitter.
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