VHDL-based Implementation of Simon's Memory Game

Welcome to the Simon's Memory Game project! This project is a VHDL-based implementation of the classic memory-testing game, on Cyclone V GX FPGA. Let's have a quick Demo of the Game in video below.

Watch my video on youtube (click on the picture below):

Why do I Build games?
In the spring of 2026, I decided that I wanted to truly master RTL design, and I asked myself: what could be more joyful than building games in hardware?=)))
That idea became the start of my FPGA game‑development adventure. The Simon-Memory-Game was my second serious milestone (first one was Pong Game), and through it I practiced real RTL design, timing, video output, and hardware‑driven game logic. This project represents the moment where my learning turned into something creative, fun, and fully my own.

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1. Project Overview

The goal of this project is to create an interactive Memory Game where the player must observe and repeat a randomly generated sequence of lights and sounds. As the player progresses, the sequences become longer and more challenging. The game features a full graphical user interface displayed on a HDMI monitor, audio feedback for every action, and melodies for both winning and losing scenarios.

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2. System Architecture

The system follows a hierarchical design, where the Top-Level Module (top/game_top) connects various specialized sub-systems. It combines complex digital logic, real-time video generation via HDMI, and high-quality audio through I2S communication.

The Memory Game's Block Diagram:

• Input Processing: Player inputs from switches and buttons are cleaned and synchronized using debounce filter.
• Game Logic: A Central State Machine (SM) manages the game rules, sequence generation, and score tracking.
• Visual Sub-system: A VGA controller generates timing signals and "paints" different screens based on the current game state (Start, Game On, Level Up, Victory, or Game Over).
• Audio Sub-system: An I2S (Inter-IC Sound) controller sends digital audio data to an external Codec to produce beeps and melodies.

State Machine(FSM):

The top/game_SM.vhd module acts as the central controller for the Simon's Memory Game, managing the logic and flow of the game through a structured state machine.

The state machine transitions through the following core phases:

• Start/Idle Phase: The game begins by displaying the Start Page on the HDMI monitor. It stays in this state until it receives a signal from the i_start button, which triggers the game to begin.
• Sequence Display Phase: During this stage, the state machine generates a sequence of patterns. It uses the LFSR module to create pseudo-random values and then activates specific bits in o_led and o_audio_en. This allows the player to see and hear the pattern they must memorize.
• User Input Phase: Once the sequence is finished, the machine waits for the player to toggle the physical i_switch inputs. The state machine compares each input against the stored sequence index to verify if the player is correct.
• Outcome Phase:
  • Success: If the player matches the entire sequence, the machine increments o_level and transitions to the Level Up screen before starting a new, longer sequence.
  • Victory: If the player reaches the maximum level limit, the machine moves to the Victory state, displaying the victory screen and playing a celebratory melody.
  • Game Over: If the player makes a mistake, the machine immediately switches to the Game Over state, triggering the game over screen and melody.

Throughout these states, the module uses the o_page_En signal to tell the visual system which specific page (Start, GameOn, LevelUp, Victory, or GameOver) to "paint" on the screen.

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3. Detailed Module Explanation

Core Logic Modules

• top/game_top: This is the "root" of the project. It connects all major components like the game logic, display, and audio together to form a complete system.
• top/game_SM: The "brain" of the game. It handles the state transitions—such as waiting for the player to start, showing the sequence, and checking if the player's input is correct.
• utility/LFSR (Linear Feedback Shift Register): This module provides "pseudo-random" numbers, which are essential for creating unpredictable sequences for the player to memorize.
• utility/game_pack: A library containing shared constants, functions, and definitions (like character drawing logic) used across multiple modules.

Display & Visual Modules

• video_display/HVsync: Generates the Horizontal and Vertical synchronization signals required for HDMI monitor to display a stable image.
• video_display/display: The top-level visual module. It receives the game state and pixel coordinates to decide what should be shown on the screen at any given time.
• video_display/draw_obj_... (Hearts, Start, Victory, etc.): These modules contain the geometric logic to define where specific text or shapes (like the "hearts") should appear on the screen.
• video_display/paint_page_...: These modules act as "color filters." They take the signals from the drawing objects and assign specific RGB color values to them based on the game's current screen (e.g., coloring the "Start" page or "Victory" page).

Audio & Sound Modules

• audio/audio_top: Manages the various sound sources (beeps for buttons and melodies for game results) and feeds the active sound to the transmitter.
• audio/i2s_tx: Converts parallel digital audio data into a serial format (I2S) to communicate with the hardware's Audio DAC.
• audio/beep_gen & audio/melody_gen: These modules generate the square waves and sequences of notes that create the sound effects.

Utility Modules

• utility/debounce_filter: This is critical for mechanical buttons. It ensures that a single physical press is registered as exactly one electronic pulse by ignoring "bouncing" noise.
• utility/sevenSeg_display: Drives the 7-segment displays on the FPGA board to show the current level/score.
• utility/freq_divider: Scales the high-frequency system clock down to lower frequencies needed by other components, such as the HDMI pixel clock.

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4. Hardware Deployment & Setup Guide

The project is specifically designed for the Altera Cyclone V GX Starter Kit (FPGA device part number 5CGXFC5C6F27C7).

The hardware components used in Simon's Memory Game project include:

• Switches and Push Buttons
• HDMI TX - Video Output Interface
• 24-bit CODEC line-out - Audio Output Hardware
• 7-Segment (Hex) Displays

Setup:

To run this game, please follow these steps:

1. Hardware Requirements:
   • Cyclone V GX Starter Kit (or compatible board).
   • HDMI Monitor and Cable.
   • Speakers or Headphones (connected to the Line Out/Phone jack).
2. Toolchain: Open the project in Intel Quartus II.
3. Synthesis:
   • Add all provided .vhd files to your project.
   • Set game_top.vhd as the Top-Level Entity.
   • Compile the design to ensure all logic fits within the FPGA resources.
4. Pin Assignment: Map the inputs (switches, buttons, 50MHz clock) and outputs (HDMI DE/HS/VS/Data-Bus, I2S MCLK/BCLK/LRCLK/DATA, 7-Segment pins) to the specific pins of your board. For the Cyclone V GX FPGA, I have used the follwing Pinout table:

Click here to open the Pinout-Table.CSV

5. Programming: Connect your board via USB-Blaster and upload the generated .sof file.
6. Playing the Game:
   • Use the Start button to begin.
   • Watch the HDMI screen and listen to the sequence.
   • Use the Switches to input your answer.
   • Check the 7-Segment display to track your current level.

Enjoy testing your memory with this FPGA-powered Simon's game!