Amith-Joy / repository

8-Point_FFT

Designed the architecture for an 8-point radix 2 decimation in time fast Fourier transform. The project also shows how the same architecture used for FFT can be used to compute the IFFT. The FFT/IFFT architecture is then pipelined to get reduce the critical time. The FFT/IFFT and its pipelined version are implemented in Verilog.